Info: Starting: Create block symbol file (.bsf)
Info: qsys-generate C:\ALTERA\NIOS_LED\NIOS_LED.qsys --block-symbol-file --output-directory=C:\ALTERA\NIOS_LED\NIOS_LED --family="MAX 10" --part=10M08DAF256C8GES
Progress: Loading NIOS_LED/NIOS_LED.qsys
Progress: Reading input file
Progress: Adding clk_0 [clock_source 16.0]
Progress: Parameterizing module clk_0
Progress: Adding hex7led_0 [hex7led 1.0]
Progress: Parameterizing module hex7led_0
Progress: Adding nios2_gen2_0 [altera_nios2_gen2 16.0]
Progress: Parameterizing module nios2_gen2_0
Progress: Adding onchip_memory2_0 [altera_avalon_onchip_memory2 16.0]
Progress: Parameterizing module onchip_memory2_0
Progress: Adding pio_0 [altera_avalon_pio 16.0]
Progress: Parameterizing module pio_0
Progress: Adding timer_0 [altera_avalon_timer 16.0]
Progress: Parameterizing module timer_0
Progress: Building connections
Progress: Parameterizing connections
Progress: Validating
Progress: Done reading input file
Info: qsys-generate succeeded.
Info: Finished: Create block symbol file (.bsf)
Info: 
Info: Starting: Create HDL design files for synthesis
Info: qsys-generate C:\ALTERA\NIOS_LED\NIOS_LED.qsys --synthesis=VHDL --output-directory=C:\ALTERA\NIOS_LED\NIOS_LED\synthesis --family="MAX 10" --part=10M08DAF256C8GES
Progress: Loading NIOS_LED/NIOS_LED.qsys
Progress: Reading input file
Progress: Adding clk_0 [clock_source 16.0]
Progress: Parameterizing module clk_0
Progress: Adding hex7led_0 [hex7led 1.0]
Progress: Parameterizing module hex7led_0
Progress: Adding nios2_gen2_0 [altera_nios2_gen2 16.0]
Progress: Parameterizing module nios2_gen2_0
Progress: Adding onchip_memory2_0 [altera_avalon_onchip_memory2 16.0]
Progress: Parameterizing module onchip_memory2_0
Progress: Adding pio_0 [altera_avalon_pio 16.0]
Progress: Parameterizing module pio_0
Progress: Adding timer_0 [altera_avalon_timer 16.0]
Progress: Parameterizing module timer_0
Progress: Building connections
Progress: Parameterizing connections
Progress: Validating
Progress: Done reading input file
Info: NIOS_LED: Generating NIOS_LED "NIOS_LED" for QUARTUS_SYNTH
Info: hex7led_0: "NIOS_LED" instantiated hex7led "hex7led_0"
Info: nios2_gen2_0: "NIOS_LED" instantiated altera_nios2_gen2 "nios2_gen2_0"
Info: onchip_memory2_0: Starting RTL generation for module 'NIOS_LED_onchip_memory2_0'
Info: onchip_memory2_0:   Generation command is [exec C:/altera_lite/16.0/quartus/bin64/perl/bin/perl.exe -I C:/altera_lite/16.0/quartus/bin64/perl/lib -I C:/altera_lite/16.0/quartus/sopc_builder/bin/europa -I C:/altera_lite/16.0/quartus/sopc_builder/bin/perl_lib -I C:/altera_lite/16.0/quartus/sopc_builder/bin -I C:/altera_lite/16.0/quartus/../ip/altera/sopc_builder_ip/common -I C:/altera_lite/16.0/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2 -- C:/altera_lite/16.0/quartus/../ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2/generate_rtl.pl --name=NIOS_LED_onchip_memory2_0 --dir=C:/Users/PROTON/AppData/Local/Temp/alt7336_1666975521086071734.dir/0003_onchip_memory2_0_gen/ --quartus_dir=C:/altera_lite/16.0/quartus --verilog --config=C:/Users/PROTON/AppData/Local/Temp/alt7336_1666975521086071734.dir/0003_onchip_memory2_0_gen//NIOS_LED_onchip_memory2_0_component_configuration.pl  --do_build_sim=0  ]
Info: onchip_memory2_0: Done RTL generation for module 'NIOS_LED_onchip_memory2_0'
Info: onchip_memory2_0: "NIOS_LED" instantiated altera_avalon_onchip_memory2 "onchip_memory2_0"
Info: pio_0: Starting RTL generation for module 'NIOS_LED_pio_0'
Info: pio_0:   Generation command is [exec C:/altera_lite/16.0/quartus/bin64/perl/bin/perl.exe -I C:/altera_lite/16.0/quartus/bin64/perl/lib -I C:/altera_lite/16.0/quartus/sopc_builder/bin/europa -I C:/altera_lite/16.0/quartus/sopc_builder/bin/perl_lib -I C:/altera_lite/16.0/quartus/sopc_builder/bin -I C:/altera_lite/16.0/quartus/../ip/altera/sopc_builder_ip/common -I C:/altera_lite/16.0/quartus/../ip/altera/sopc_builder_ip/altera_avalon_pio -- C:/altera_lite/16.0/quartus/../ip/altera/sopc_builder_ip/altera_avalon_pio/generate_rtl.pl --name=NIOS_LED_pio_0 --dir=C:/Users/PROTON/AppData/Local/Temp/alt7336_1666975521086071734.dir/0004_pio_0_gen/ --quartus_dir=C:/altera_lite/16.0/quartus --verilog --config=C:/Users/PROTON/AppData/Local/Temp/alt7336_1666975521086071734.dir/0004_pio_0_gen//NIOS_LED_pio_0_component_configuration.pl  --do_build_sim=0  ]
Info: pio_0: Done RTL generation for module 'NIOS_LED_pio_0'
Info: pio_0: "NIOS_LED" instantiated altera_avalon_pio "pio_0"
Info: timer_0: Starting RTL generation for module 'NIOS_LED_timer_0'
Info: timer_0:   Generation command is [exec C:/altera_lite/16.0/quartus/bin64//perl/bin/perl.exe -I C:/altera_lite/16.0/quartus/bin64//perl/lib -I C:/altera_lite/16.0/quartus/sopc_builder/bin/europa -I C:/altera_lite/16.0/quartus/sopc_builder/bin/perl_lib -I C:/altera_lite/16.0/quartus/sopc_builder/bin -I C:/altera_lite/16.0/quartus/../ip/altera/sopc_builder_ip/common -I C:/altera_lite/16.0/quartus/../ip/altera/sopc_builder_ip/altera_avalon_timer -- C:/altera_lite/16.0/quartus/../ip/altera/sopc_builder_ip/altera_avalon_timer/generate_rtl.pl --name=NIOS_LED_timer_0 --dir=C:/Users/PROTON/AppData/Local/Temp/alt7336_1666975521086071734.dir/0005_timer_0_gen/ --quartus_dir=C:/altera_lite/16.0/quartus --verilog --config=C:/Users/PROTON/AppData/Local/Temp/alt7336_1666975521086071734.dir/0005_timer_0_gen//NIOS_LED_timer_0_component_configuration.pl  --do_build_sim=0  ]
Info: timer_0: Done RTL generation for module 'NIOS_LED_timer_0'
Info: timer_0: "NIOS_LED" instantiated altera_avalon_timer "timer_0"
Info: avalon_st_adapter: Inserting error_adapter: error_adapter_0
Info: avalon_st_adapter_001: Inserting error_adapter: error_adapter_0
Info: avalon_st_adapter_002: Inserting error_adapter: error_adapter_0
Info: avalon_st_adapter_003: Inserting error_adapter: error_adapter_0
Info: avalon_st_adapter_004: Inserting error_adapter: error_adapter_0
Info: mm_interconnect_0: "NIOS_LED" instantiated altera_mm_interconnect "mm_interconnect_0"
Info: irq_mapper: "NIOS_LED" instantiated altera_irq_mapper "irq_mapper"
Info: rst_controller: "NIOS_LED" instantiated altera_reset_controller "rst_controller"
Info: cpu: Starting RTL generation for module 'NIOS_LED_nios2_gen2_0_cpu'
Info: cpu:   Generation command is [exec C:/altera_lite/16.0/quartus/bin64//eperlcmd.exe -I C:/altera_lite/16.0/quartus/bin64//perl/lib -I C:/altera_lite/16.0/quartus/sopc_builder/bin/europa -I C:/altera_lite/16.0/quartus/sopc_builder/bin/perl_lib -I C:/altera_lite/16.0/quartus/sopc_builder/bin -I C:/altera_lite/16.0/quartus/../ip/altera/nios2_ip/altera_nios2_gen2/cpu_lib -I C:/altera_lite/16.0/quartus/../ip/altera/nios2_ip/altera_nios2_gen2/nios_lib -I C:/altera_lite/16.0/quartus/../ip/altera/nios2_ip/altera_nios2_gen2 -I C:/altera_lite/16.0/quartus/../ip/altera/nios2_ip/altera_nios2_gen2 -- C:/altera_lite/16.0/quartus/../ip/altera/nios2_ip/altera_nios2_gen2/generate_rtl.epl --name=NIOS_LED_nios2_gen2_0_cpu --dir=C:/Users/PROTON/AppData/Local/Temp/alt7336_1666975521086071734.dir/0008_cpu_gen/ --quartus_bindir=C:/altera_lite/16.0/quartus/bin64/ --verilog --config=C:/Users/PROTON/AppData/Local/Temp/alt7336_1666975521086071734.dir/0008_cpu_gen//NIOS_LED_nios2_gen2_0_cpu_processor_configuration.pl  --do_build_sim=0  ]
Info: cpu: # 2017.06.19 15:29:07 (*) Starting Nios II generation
Info: cpu: # 2017.06.19 15:29:07 (*)   Checking for plaintext license.
Info: cpu: # 2017.06.19 15:29:09 (*)   Couldn't query license setup in Quartus directory C:/altera_lite/16.0/quartus/bin64/
Info: cpu: # 2017.06.19 15:29:09 (*)   Defaulting to contents of LM_LICENSE_FILE environment variable
Info: cpu: # 2017.06.19 15:29:09 (*)   LM_LICENSE_FILE environment variable is empty
Info: cpu: # 2017.06.19 15:29:09 (*)   Plaintext license not found.
Info: cpu: # 2017.06.19 15:29:09 (*)   No license required to generate encrypted Nios II/e.
Info: cpu: # 2017.06.19 15:29:09 (*)   Elaborating CPU configuration settings
Info: cpu: # 2017.06.19 15:29:09 (*)   Creating all objects for CPU
Info: cpu: # 2017.06.19 15:29:10 (*)   Generating RTL from CPU objects
Info: cpu: # 2017.06.19 15:29:10 (*)   Creating plain-text RTL
Info: cpu: # 2017.06.19 15:29:12 (*) Done Nios II generation
Info: cpu: Done RTL generation for module 'NIOS_LED_nios2_gen2_0_cpu'
Info: cpu: "nios2_gen2_0" instantiated altera_nios2_gen2_unit "cpu"
Info: nios2_gen2_0_data_master_translator: "mm_interconnect_0" instantiated altera_merlin_master_translator "nios2_gen2_0_data_master_translator"
Info: hex7led_0_avalon_slave_0_translator: "mm_interconnect_0" instantiated altera_merlin_slave_translator "hex7led_0_avalon_slave_0_translator"
Info: nios2_gen2_0_data_master_agent: "mm_interconnect_0" instantiated altera_merlin_master_agent "nios2_gen2_0_data_master_agent"
Info: hex7led_0_avalon_slave_0_agent: "mm_interconnect_0" instantiated altera_merlin_slave_agent "hex7led_0_avalon_slave_0_agent"
Info: hex7led_0_avalon_slave_0_agent_rsp_fifo: "mm_interconnect_0" instantiated altera_avalon_sc_fifo "hex7led_0_avalon_slave_0_agent_rsp_fifo"
Info: router: "mm_interconnect_0" instantiated altera_merlin_router "router"
Info: router_001: "mm_interconnect_0" instantiated altera_merlin_router "router_001"
Info: router_002: "mm_interconnect_0" instantiated altera_merlin_router "router_002"
Info: router_003: "mm_interconnect_0" instantiated altera_merlin_router "router_003"
Info: router_005: "mm_interconnect_0" instantiated altera_merlin_router "router_005"
Info: hex7led_0_avalon_slave_0_burst_adapter: "mm_interconnect_0" instantiated altera_merlin_burst_adapter "hex7led_0_avalon_slave_0_burst_adapter"
Info: cmd_demux: "mm_interconnect_0" instantiated altera_merlin_demultiplexer "cmd_demux"
Info: cmd_demux_001: "mm_interconnect_0" instantiated altera_merlin_demultiplexer "cmd_demux_001"
Info: cmd_mux: "mm_interconnect_0" instantiated altera_merlin_multiplexer "cmd_mux"
Info: cmd_mux_001: "mm_interconnect_0" instantiated altera_merlin_multiplexer "cmd_mux_001"
Info: Reusing file C:/ALTERA/NIOS_LED/NIOS_LED/synthesis/submodules/altera_merlin_arbitrator.sv
Info: rsp_demux: "mm_interconnect_0" instantiated altera_merlin_demultiplexer "rsp_demux"
Info: rsp_mux: "mm_interconnect_0" instantiated altera_merlin_multiplexer "rsp_mux"
Info: Reusing file C:/ALTERA/NIOS_LED/NIOS_LED/synthesis/submodules/altera_merlin_arbitrator.sv
Info: rsp_mux_001: "mm_interconnect_0" instantiated altera_merlin_multiplexer "rsp_mux_001"
Info: Reusing file C:/ALTERA/NIOS_LED/NIOS_LED/synthesis/submodules/altera_merlin_arbitrator.sv
Info: hex7led_0_avalon_slave_0_rsp_width_adapter: "mm_interconnect_0" instantiated altera_merlin_width_adapter "hex7led_0_avalon_slave_0_rsp_width_adapter"
Info: Reusing file C:/ALTERA/NIOS_LED/NIOS_LED/synthesis/submodules/altera_merlin_address_alignment.sv
Info: Reusing file C:/ALTERA/NIOS_LED/NIOS_LED/synthesis/submodules/altera_merlin_burst_uncompressor.sv
Info: avalon_st_adapter: "mm_interconnect_0" instantiated altera_avalon_st_adapter "avalon_st_adapter"
Info: avalon_st_adapter_001: "mm_interconnect_0" instantiated altera_avalon_st_adapter "avalon_st_adapter_001"
Info: error_adapter_0: "avalon_st_adapter" instantiated error_adapter "error_adapter_0"
Info: error_adapter_0: "avalon_st_adapter_001" instantiated error_adapter "error_adapter_0"
Info: NIOS_LED: Done "NIOS_LED" with 33 modules, 59 files
Info: qsys-generate succeeded.
Info: Finished: Create HDL design files for synthesis
